The retrieval of data from a conventional memory, based upon the matching of a stored pattern with a given one, is a very time-consuming task. One way of significantly reducing the time involved in providing such a matching capability is to use parallel processing in which an input word may be compared to a plurality of stored words at the same time. CCD devices are especially appropriate for parallel processing. Such devices consist basically of long rows of electrodes which move charge packets from one end of the row to another or back and forth along the row. At one end of the row is a charge injecting device, normally a diode and a few control gates. At the other end of the row is a dump diode which removes the charge from the chip. The other main component is a charge sensing device which detects the charge packets before they are dumped, such as in video cameras or in parallel over the whole row in a parallel processing application. The use of CCD technology for parallel processing is not new per se. Thus for example, CCD's are shown used in a parallel processing application for vector-matrix multiplication in an article entitled "A Parallel Analog CCD/CMOS Neural Network IC" by Neugebauer and Yariv in the proceedings of the IJCNN July, 1991 and as described in an article entitled "The CCD Neural Processor: A Neural Network Integrated Circuit with 65536 Programmable Analog Synapses" by Agranat, Neugebauer, Nelson and Yariv, IEEE Transactions on Circuits and Systems, Volume 37, No. 8, August, 1990, Page 1073-1075. However, the applicants herein know of no prior art disclosure for using a parallel processing CCD for pattern matching and the like as disclosed herein.